1. Field of the Invention
The present Invention is related to an improvement of The programmable impedance output buffer driver and the semiconductor device such as a static random access memory provided with a programmable impedance output buffer driver for adjusting the impedance of the output buffer circuit of the semiconductor device.
2. Description of the Related Art
In the recent years, along with increasing frequencies of input/output operations in the field of the semiconductor integrated circuits, it becomes increasingly important to avoid matching problems caused between the impedance of an output buffer circuit and the impedance of a transmission line formed on a printed circuit board (PCB).
In the prior art semiconductor devices, however, if there exists a mismatch between the impedance of the bus lines of the system and the impedance of the output buffer circuit of the device which is connected to the bus lines, undesirable reflection waves take place at the interface so that it is impossible to realize high speed data transmission and high speed operation of the system bus due to the reflection waves.
A new technique called the programmable impedance output buffer driver has been proposed wherein even if the environment is changed, the impedance of the output buffer circuit can be finely adjusted to a 1/n of the impedance as prepared between a ZQ pad and VSS by a user. This technique becomes one of the important circuit techniques for realizing the high speed data transmission.
FIG. 1 is a circuit diagram showing the outline of the programmable impedance output buffer driver in accordance with prior art techniques. One terminal of an off-chip resistor 50 is connected to a pad ZQ of the semiconductor integrated circuit which is provided with the programmable impedance output buffer driver by a user. The other terminal of the off-chip resistor 50 is connected to the ground terminal. The voltage applied to the pad ZQ is adjusted to a constant voltage, i.e., the half reference potential (VDDQ/2) of the higher output potential (VDDQ) to be output from the programmable impedance output buffer, or an arbitrary appropriate potential within the tolerable vicinity thereof by means of a VZQ controller 1. A current mirror circuit 2 serves to reflect the electric current passing through the off-chip resistor 50 in order that the amount of the current passing through a pull-up dummy buffer circuit 3 is equal to the off-chip resistor 50.
At this time, the pull-up counter 4 is used to adjust the impedance of the pull-up dummy buffer circuit 3 equal to the resistance value of the off-chip resistor 50 by controlling the on/off operation of a plurality of transistors constituting the pull-up dummy buffer circuit 3 in order to change the total channel width of the transistors so that the potential level of the connection point between the pull-up dummy buffer circuit 3 and the current mirror circuit 2 is equal to VDDQ/2.
FIG. 2 is a circuit diagram showing the outline of the pull-up dummy buffer circuit 3 as described above. The pull-up dummy buffer circuit 3 is comprised of a plurality of MOS transistors Tr connected in parallel. The impedance of the pull-up dummy buffer circuit 3 can be adjusted by controlling the on/off operation of a plurality of the transistors Tr constituting the pull-up dummy buffer circuit 3.
FIG. 3 is a circuit diagram showing the outline of the pull-up output buffer circuit 7 as described above. The pull-up output buffer circuit 7 is also comprised of a plurality of MOS transistors Tr connected in parallel. In this case, the channel width of the transistors Tr is designed to be larger than the channel width of the MOS transistors constituting the pull-up dummy buffer circuit by a factor of n, where n is no smaller than 1. Typically, the number n is an integer, for example, five.
Because of this, the impedance of the pull-up output buffer circuit 7 can be adjusted by controlling the on/off operation of a plurality of the MOS transistors constituting the pull-up output buffer circuit 7, in the same manner as the channel width of the pull-up dummy buffer circuit 3, in order to adjust the impedance of the pull-up output buffer circuit 7 to a constant value corresponding to the value of the off-chip resistor 50.
Accordingly, by selecting an appropriate resistance value of the off-chip resistor 50, the impedance of the pull-up output buffer circuit 7 can be adjusted to the impedance of the propagation line on the printed circuit board.
Thence even if there is a change in the environment of the semiconductor integrated circuit provided with the programmable impedance output buffer driver as described above, for example, the power voltage, The temperature and so forth, it is possible to always maintain the constant value of the impedance of the pull-up output buffer circuit 7, to maintain the impedance matching between the impedance of the pull-up output buffer circuit 7 and the impedance of the propagation line resulting in the possibility of the high speed operation of the semiconductor integrated circuit as described above.
The pull-down output buffer circuit 8 is adjusted in the same manner. Namely, the pull-down counter 6 is used to adjust the impedance of the pull-down dummy buffer circuit 5 in order to be equal to the resistance value of the off-chip resistor 50. The adjustment information of the pull-down counter 6 is also used to adjust the impedance of the pull-down output buffer circuit 8 in order to be equal to a 1/n of the resistance value of the off-chip resistor 50. Typically, the number n is an integer, for example, five as described above.
On the other hand, the mirror ratio of the current mirror circuit 2 for the prior art programmable impedance output buffer driver, i.e., the ratio of the electric current as output relative to the electric current as input from the current mirror circuit is preferably 1 or nearly 1 for the purpose of improving the accuracy of adjustment of the pull-up dummy buffer circuit 3 or the pull-down dummy buffer circuit 5. Accordingly, the current mirror circuit 2 is composed of the transistors connected to each other in series in order to make the mirror ratio of the current mirror circuit 2 as nearer to 1 as possible.
However, along with the decrease in the output voltage from the output pad 9 as recently required, since there results a substantial decrease in the differential voltage between the source and the drain, it is difficult to enable a stable operation of the transistors of the current mirror circuit 2 in the pentode region during an impedance matching operation conducted by controlling the on/off operation of the MOS transistors Tr constituting the pull-up dummy buffer circuit 3 or the pull-down dummy buffer circuit 5.
Particularly, since there is a substantial voltage drop between the source and the drain of the transistors connected in series of the current mirror circuit 2, which serves to flow the mirror current through the pull-up dummy buffer circuit 3, the mirror ratio of the mirror current largely deviate away from the desired value of 1 as described above so that the electric current passing through the pull-up dummy buffer circuit 3 is no longer in agreement with the electric current passing through the off-chip resistor 50.
Because of this, unlike the impedance of the pull-down dummy buffer circuit 5, the impedance of the pull-up dummy buffer circuit 3 can no longer be adjusted to the resistance value of the off-chip resistor 50. The impedance of the pull-up output buffer circuit 7 is thereby not adjusted to the value corresponding to the resistance value of the resistor 50.
By this configuration, reflection waves occurs between the output pad 9 and the propagation line not shown in the figure and therefore adversely affect the high speed operation of the semiconductor integrated circuit even implemented with the programmable impedance output buffer driver.